Increasing the Power Efficiency of Application Specific Instruction Set Processors Using Datapath Optimization
نویسندگان
چکیده
Application specific instruction set processors (ASIPs) can be optimized both for speed and power taking advantage of the flexibility of a synthesized semi-custom implementation. The current case study evaluates the effect of datapath and instruction set optimization using two examples from terrestrial digital video broadcasting (DVB-T) acquisition and tracking algorithms. Starting from a conventional, unoptimized instruction set architecture, which uses simple instructions like any commercially available DSP, incremental application specific optimizations are performed. Results in terms of cycle count and energy per task are used to evaluate the feasibility and the power efficiency of each implementation. The results show a huge potential (> 6x) concerning power savings using this design methodology.
منابع مشابه
Alternative application-specific processor architectures for fast arbitrary bit permutations
Block ciphers are used to encrypt data and provide data confidentiality. For interoperability reasons, it is desirable to support a variety of block ciphers efficiently. Of the basic operations in block ciphers, only bit permutation is very slow on existing processors, followed by integer multiplication. Although new permutation instructions proposed recently can accelerate bit permutations in ...
متن کاملArbitrary Bit Permutations in One or Two Cycles
Symmetric-key block ciphers encrypt data, providing data confidentiality over the public Internet. For inter-operability reasons, it is desirable to support a variety of symmetric-key ciphers efficiently. We show the basic operations performed by a variety of symmetric-key cryptography algorithms. Of these basic operations, only bit permutation is very slow using existing processors, followed b...
متن کاملC-slow Technique vs Multiprocessor in designing Low Area Customized Instruction set Processor for Embedded Applications
The demand for high performance embedded processors, for consumer electronics, is rapidly increasing for the past few years. Many of these embedded processors depend upon custom built Instruction Ser Architecture (ISA) such as game processor (GPU), multimedia processors, DSP processors etc. Primary requirement for consumer electronic industry is low cost with high performance and low power cons...
متن کاملFaculty of Electrical Engineering University of Banja Luka
This paper evaluates the present state of the art of energy-efficient embedded processor design techniques and demonstrates, how small, variable-architecture embedded processors may exploit a run-time minimal architectural synthesis technique to achieve greater energy and area efficiency whilst maintaining performance. The picoMIPS architecture is presented, inspired by the MIPS, as an example ...
متن کاملEnergy Efficient Multi-Core Processing
This paper evaluates the present state of the art of energy-efficient embedded processor design techniques and demonstrates, how small, variable-architecture embedded processors may exploit a run-time minimal architectural synthesis technique to achieve greater energy and area efficiency whilst maintaining performance. The picoMIPS architecture is presented, inspired by the MIPS, as an example ...
متن کامل